Embeetle, an IDE designed from scratch for embedded software developers.Name : LM4F230H5QR
Flash : 256 kB
Flash bank : 0x40000 Bytes @ 0x0
RAM : 32 kB
RAM : 0x00008000 Bytes @ 0x00008000
description : ARM Cortex-M3 Stellaris Device
Architecture : Cortex-M4
name : ADC0
description : Register map for ADC0 peripheral
base address : 0x0
name : ADC1
description : Register map for ADC0 peripheral
base address : 0x0
name : CAN0
description : Register map for CAN0 peripheral
base address : 0x0
name : CAN1
description : Register map for CAN0 peripheral
base address : 0x0
name : COMP
description : Register map for COMP peripheral
base address : 0x0
name : EEPROM
description : Register map for EEPROM peripheral
base address : 0x0
name : FLASH_CTRL
description : Register map for FLASH_CTRL peripheral
base address : 0x0
name : GPIO_PORTA
description : Register map for GPIO_PORTA peripheral
base address : 0x0
name : GPIO_PORTA_AHB
description : Register map for GPIO_PORTA peripheral
base address : 0x0
name : GPIO_PORTB
description : Register map for GPIO_PORTA peripheral
base address : 0x0
name : GPIO_PORTB_AHB
description : Register map for GPIO_PORTA peripheral
base address : 0x0
name : GPIO_PORTC
description : Register map for GPIO_PORTA peripheral
base address : 0x0
name : GPIO_PORTC_AHB
description : Register map for GPIO_PORTA peripheral
base address : 0x0
name : GPIO_PORTD
description : Register map for GPIO_PORTA peripheral
base address : 0x0
name : GPIO_PORTD_AHB
description : Register map for GPIO_PORTA peripheral
base address : 0x0
name : GPIO_PORTE
description : Register map for GPIO_PORTA peripheral
base address : 0x0
name : GPIO_PORTE_AHB
description : Register map for GPIO_PORTA peripheral
base address : 0x0
name : GPIO_PORTF
description : Register map for GPIO_PORTA peripheral
base address : 0x0
name : GPIO_PORTF_AHB
description : Register map for GPIO_PORTA peripheral
base address : 0x0
name : HIB
description : Register map for HIB peripheral
base address : 0x0
name : I2C0
description : Register map for I2C0 peripheral
base address : 0x0
name : I2C1
description : Register map for I2C0 peripheral
base address : 0x0
name : I2C2
description : Register map for I2C0 peripheral
base address : 0x0
name : I2C3
description : Register map for I2C0 peripheral
base address : 0x0
name : NVIC
description : Register map for NVIC peripheral
base address : 0x0
name : PWM0
description : Register map for PWM0 peripheral
base address : 0x0
name : PWM1
description : Register map for PWM0 peripheral
base address : 0x0
name : QEI0
description : Register map for QEI0 peripheral
base address : 0x0
name : QEI1
description : Register map for QEI0 peripheral
base address : 0x0
name : SSI0
description : Register map for SSI0 peripheral
base address : 0x0
name : SSI1
description : Register map for SSI0 peripheral
base address : 0x0
name : SSI2
description : Register map for SSI0 peripheral
base address : 0x0
name : SSI3
description : Register map for SSI0 peripheral
base address : 0x0
name : SYSCTL
description : Register map for SYSCTL peripheral
base address : 0x0
name : SYSEXC
description : Register map for SYSEXC peripheral
base address : 0x0
name : TIMER0
description : Register map for TIMER0 peripheral
base address : 0x0
name : TIMER1
description : Register map for TIMER0 peripheral
base address : 0x0
name : TIMER2
description : Register map for TIMER0 peripheral
base address : 0x0
name : TIMER3
description : Register map for TIMER0 peripheral
base address : 0x0
name : TIMER4
description : Register map for TIMER0 peripheral
base address : 0x0
name : TIMER5
description : Register map for TIMER0 peripheral
base address : 0x0
name : UART0
description : Register map for UART0 peripheral
base address : 0x0
name : UART1
description : Register map for UART0 peripheral
base address : 0x0
name : UART2
description : Register map for UART0 peripheral
base address : 0x0
name : UART3
description : Register map for UART0 peripheral
base address : 0x0
name : UART4
description : Register map for UART0 peripheral
base address : 0x0
name : UART5
description : Register map for UART0 peripheral
base address : 0x0
name : UART6
description : Register map for UART0 peripheral
base address : 0x0
name : UART7
description : Register map for UART0 peripheral
base address : 0x0
name : UDMA
description : Register map for UDMA peripheral
base address : 0x0
name : USB0
description : Register map for USB0 peripheral
base address : 0x0
name : WATCHDOG0
description : Register map for WATCHDOG0 peripheral
base address : 0x0
name : WATCHDOG1
description : Register map for WATCHDOG0 peripheral
base address : 0x0
name : WTIMER0
description : Register map for WTIMER0 peripheral
base address : 0x0
name : WTIMER1
description : Register map for TIMER0 peripheral
base address : 0x0
name : WTIMER2
description : Register map for TIMER0 peripheral
base address : 0x0
name : WTIMER3
description : Register map for TIMER0 peripheral
base address : 0x0
name : WTIMER4
description : Register map for TIMER0 peripheral
base address : 0x0
name : WTIMER5
description : Register map for TIMER0 peripheral
base address : 0x0
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.